Contents
Introduction
Post
MATHEMATICS
NETWORK ANALYSIS
ELECTROMAGNETISM (EM)
ELECTRONIC DEVICES & CIRCUITS (EC)
DIGITAL ELECTRONICS
CONTROL SYSTEM
COMMUNICATIONS
SIGNALS & SYSTEMS (SS)
J-K Flip Flop
Ask
A correct output is achieved from a master-slave J-K flip-flop only if its inputs are stable while the
(a)clock is LOW
(b)slave is transferring
(c)flip-flop is reset
(d)clock is HIGH
Answer is (d)
Concept
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